Hardware & FPGA
Deep dive into RTL design, SystemVerilog, and Digital Signal Processing. Featuring Real-Time SDR and Image Acceleration projects.
Work Experience
Embedded Software Engineer Coop @ Christie Digital
May 2024 ā Aug 2025- Executed Hardware-Software Co-design by integrating a MicroBlaze soft-core processor via AXI4-Lite interconnect into a high-priority System Verilog pipeline, enabling rapid debugging in FPGA hardware.
- Upgraded and validated legacy FPGA IP blocks for Ultrascale+ PCIe compatibility, analyzing utilization reports and ensuring Static Timing Analysis (STA) closure.
- Designed, implemented, and verified RTL for a custom hardware block, independently creating a System Verilog testbench, using DVE waveform analysis for validation, and resolving functional bugs and lint errors to meet production standards.
- Rebuilt a critical simulation testbench from scratch, implementing comprehensive UART protocol tests for Regression Testing to verify data flow integrity.
Research Assistant II @ Stellantis / McMaster
May 2023 ā Aug 2023- Designed and installed mounts that were inserted into the 6-phase inverter setup using Autodesk Inventor.
- Conducted continuity testing on different PCBs that were being installed into the DC Motor setup using multimeters as well as referencing their design on Altium and validated them.
- Conducted test result analysis by developing MATLAB algorithms that would accept data across a time span and output different data values such as mean, max, and range to determine effectiveness of setup within different parameters.
Key Projects
Real-Time SDR Receiver
Developed a multi-threaded C++ application to demodulate real-time FM mono and stereo audio from raw IQ samples. Engineered the RDS processing path, including channel extraction and carrier recovery.
- C++
- DSP
- Linux
- Multithreading
Hardware-Accelerated Image Decompression System
Designed a pipelined architecture on an Altera DE2 FPGA to perform colour space conversion and bilinear interpolation. Implemented IDCT using resource-shared multipliers.
- SystemVerilog
- FPGA
- ModelSim
- SRAM
3D Spatial Measurement System
Designed a firmware driver in C within the Keil IDE to interface with a LiDAR sensor via I2C and UART. Implemented servo motor control logic for 360-degree scanning.
- C
- Keil
- UART/I2C
- MATLAB
Relevant Skills
Languages
- Python
- C/C++
- SystemVerilog
- Verilog/VHDL
- MATLAB
- Tcl
Technologies
- Xilinx Vivado
- Speedgoat/dSpace
- Altium Designer
- Linux
- Git/Subversion
Protocols
- AXI4 / AXI-Stream
- CAN / PCIe
- JTAG / I2C / SPI
- TCP/UDP
Get In Touch
I'm always open to opportunities to work on FPGA designs. Whether you have a question or just want to say hi, my inbox is always open!
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